Features for the AM3352
Category | Specification |
---|---|
Processor Core | Up to 1-GHz Sitara™ ARM® Cortex®-A8 32‑Bit RISC Processor with NEON™ SIMD Coprocessor |
Cache Memory |
|
Memory Interfaces |
|
PRU-ICSS |
|
Description for the AM3352
The AM335x microprocessors, based on the ARM Cortex-A8 processor, are enhanced with image, graphics processing,
peripherals and industrial interface options such as EtherCAT and PROFIBUS. The devices support high-level operating systems (HLOS).
Processor SDK Linux® and TI-RTOS are available free of charge from TI.
The AM335x microprocessor contains the subsystems shown in the Functional Block Diagram and a brief description of each follows:
The contains the subsystems shown in the Functional Block Diagram and a brief description of each follows:
The microprocessor unit (MPU) subsystem is based on the ARM Cortex-A8 processor and the PowerVR SGX™ Graphics
Accelerator subsystem provides 3D graphics acceleration to support display and gaming effects.
The PRU-ICSS is separate from the ARM core, allowing independent operation and clocking for greater efficiency and flexibility.
The PRU-ICSS enables additional peripheral interfaces and real-time protocols such as EtherCAT, PROFINET, EtherNet/IP, PROFIBUS,
Ethernet Powerlink, Sercos, and others. Additionally, the programmable nature of the PRU-ICSS, along with its access to pins,
events and all system-on-chip (SoC) resources, provides flexibility in implementing fast, real-time responses, specialized data handling
operations, custom peripheral interfaces, and in offloading tasks from the other processor cores of SoC.